Radio interferometer

ABSTRACT

An interferometer system for measuring the elevation angle of a remote radio source, comprising a linear array of equallyspaced aerial elements, a series of phase discriminators, each coupled to a common aerial and to one of the other aerials in order to measure phase differences between the incident waves, and signal processing units for averaging out the measured phase differences and to derive therefrom an indication of the elevation angle of the radiation incident on the aerial array.

Unite States Lucas et al.

RADIO INTERFEROMETER Inventors: David Adrian Lucas; Richard PaulVincent, both of Salfords, near Redhill, England US. PhilipsCorporation, New York, NY.

Filed: May 11,1973

Appl. No.: 359,227

Assignee:

Foreign Application Priority Data May 17, i972 United Kingdom 231l0/72US. Cl 343/113 R Int. Cl. G015 3/48 Field of Search 343/113 R, 108;324/83 D References Cited UNITED STATES PATENTS 4/1966 Vogel 343/l13 RSUPERHETERODYNE AERIAL HMIS PHASE DISORIHIIIATORS we 12 June 10, 19753,742,505 6/1973 Rocke 343/113 R 3,787,863 l/l974 Watamabe et al. 343/113 R 3,803,612 4/1974 AlCOCk 343/113 R Primary Exami'nerMaynard R.Wilbur Assistant Examiner-Richard E. Berger Attorney, Agent, orFirmFrank R. Trifari; George B. Berka [57] ABSTRACT 9 Claims, 24 DrawingFigures ADDERS PATENTEDJUH 10 1975 SHEET 8 6 I X RNA H6 4 4 X I. 3 2 gE! n ml l h FL p. w n 2 A... C

SHEET PATENTEDJUH 10 I975 lsFl Fig.5

PATENTEDJUH 10 I975 LA-L AT rm- LA PATENTEDJUH 10 I975 P IHT Fig.12.

CSF

PATENTEDJUH 10 1925 SHEET ea ze'r PATENTEUJUH 10 1975 PUT: OiILLT m ellll U LOGlC ADDERS PHASE DESCRlhllNATORS SUPERHETERODYNE RADIOINTERFEROMETER This invention relates to an interferometer system formeasuring the vertical angle of a remote radio source: the invention isparticularly directed toward the problem of indicating small anglesabove the horizon such as is necessary for example in aircraft landingsystems.

In a vertical interferometer, measurement of elevation angle on targetsnear the horizon presents a difficult problem because of the effect ofground reflections upon the phase angle measured by the interferometer.At low angles of incidence the reflection coefficient for a typicalterrain tends to approach unity and this gives rise to a verticalinterference pattern with phase discontinuities which approach 180 atamplitude nulls so that angle measurements which rely upon phasedifference measurement between two aerial elements are subject to phaseerrors that may approach this figure. The basic considerations involvedare conveniently set out in Microwave Engineering by A. F. Harvey,Academic Press, 1963, at page 1066, see particularly FIG. 23.2 and theproblem is considered also in somewhat greater detail in a communicationby D. K. Barton in proceedings I.E.E.E. 1965 page 543. Barton shows inhis FIG. 2 how the measured phase difference in the presence of groundreflections may differ very significantly from the true phase differencewhich would be measured in the absence of those reflections.

According to the present invention a vertical radio interferometersystem comprises a vertically-extending rectilenear array ofequally-spaced aerial elements forming between a common element and eachof the other elements respectively a plurality of interferometer pairsof which the spacing increases in arithmetical progression, a series ofphase discriminators each associated with a respective interferometerpair to derive therefrom a respective phase-difference measurement indigital form and digital logic means to derive from the series ofrespective measurements an average phase measurement represenative ofthe vertical angle of radiation incident on the aerial array. Suitably,each phase discriminator is operative to compare signals having a phasedifference of 8d: 2 11' (I F) radians where I is an integer and F is apositive fraction and to derive therefrom a digital measurement of theangle 2 11 F, and wherein the digital logic means is operative tocalculate the angle 2 1r I, and to add thereto the measurement derivedby the discriminator to provide a measurement in digital form of thephase difference 8d).

The digital logic means may comprise a series of digital logic stageseach associates with a respective pair of adjacent phase discriminatorsin the series of discriminators, each logic stage being operative toreceive the digital measurements from the pair of discriminators and tocalculate therefrom the angle 21rI, and a further digital logic stageassociated with only that discriminator which is associated with theclosest spaced interferometer pair.

An embodiment of the invention will now be described, by way of example,with reference to the accompanying diagrammatic'drawings in which:

FIG. 1 2 illustrates a vertical array of interferometer aerial elements,

FIG. 2 is a phase-height graph,

FIGS. 3a to 3d illustrate four possible vector spreads,

FIG. 4 illustrates the variation of measured phase (b with elevationangle 6,

FIG. 5 illustrates in block diagram form a logic processing arrangement,

FIGS. 6a to 6d 1 illustrate further vector spreads,

FIG. 7 illustrates in block diagram form a logic processing arrangementpertaining to FIGS. 6a to 6d FIGS. 8a to 8d illustrate further vectorspreads,

FIG. 9 illustrates in block diagram form a logic processing arrangementpertaining to FIGS. 8a to 8d FIG. 10 illustrates a sector definitionarrangement,

FIG. 11 illustrates in block diagram form a logic arrangement pertainingto FIG. 10,

FIG. 12 illustrates a combined logic arrangement,

FIG. 13: illustrates a logic stage,

FIG. 14: illustrates the complete system and,

FIG. 15 illustrates part of an interferometer aerial array.

Referring to FIG. 1, consider a vertically extending aerial arrayconsisting of a number of equally-spaced receiver aerials, here shown inform of horns. Let phase measurements be made between the lowest,common, aerial element c and each of the others. The phases thusmeasured may now be plotted on a phase-height graph as illustrated inFIG. 2, where the phase 4),, measured between the common element 0 andthe nth element is plotted vertically and where the spacing between 0and the nthe element is plotted horizontally; since the elements areequally-spaced by a distance d, see FIG. 1, then the height that is tosay the vertical spacing n. d is proportional to n. The deviation of theplotted points from a straight line is caused by wave-front perturbationdue to ground reflections but a straight line which passes through theorigin may be drawn in the region of these points so as to give anaverage slope indicating the variation of phase 4) with the spacingbetween the aerial elements of the interferometer pairs.

Consier now the phase difference 1b,, between the common element c andthe nth element, so that we may write 4),, 21rnd sin 0 A where Awavelength of received signal, (I) elevation angle of received signal, dspacing between adjacent elements. From which Slope n/nd 2r sin 0 Thuswe see that if we can estimate the average slope then we can estimatethe elevation angle.

In the general case, assuming no prior knowledge of the site conditions,we may assume that errors on all pairs are equally likely so that allmeasurements must be given equal weight. Let us now write down someestimates of the slope between pairs of equally-spaced elements.

First estimate E, (d), (b 4 d Second estimate E (4) 4: 4 d

Third estimate E, (b 4 d Fourth estimate E, 4 (1 Fifth estimate E ((11(b 4 d From these five estimates we may derive two sets, one comprisingthe first, second, third and fourth and the other comprising the first,second, third and fifth, each set of estimates involving each elementonce; however, since the set which includes the fifth estimate requiresa separate element to measure (1) let us consider the set comprising thefirst four estimates. From this set we can derive an average estimate ofthe slope in the form and combining this with equation (ii) we mayderive the expression or more simply (Uri- 1) bu/n (iii) (a) Anothermethod is to fit the best straight line through the origin and all thepoints, as shown in FIG. 2, in

which case the slope of this line can be denoted by Eda/din (iii) (b)which for an eight element array (n 7) gives a value In practice, fordifficult sites, the performance of the system can be improved byincorporating a weighting procedure favouring the phase measurementsknown to be accurate by a site investigation.

Let us now consider the process of phase measurement in greater detail.The phase difference at the closest spaced pair by given by (11 2n d sinqS/k In a range of angles such that sin is less than \/d, (1) liesbetween 0 and 271' and is therefore unambiguous. Over the same range, to100 n measured at the other interferometers are all ambiguous unless sin6 is less than )tln.d. In general 7 where F is a fraction between 0 and1, I is an integer The phase discriminator can only measure 2w F and onthe closest spaced pair (I), 2 1r F since I, 0. On other pairs theinteger part I is unknown and must be determined before each value of (bis known.

Consider two phases d (1,, F 2n and It will be /that provided /ld l,hereinafter denoted by /6/, is less than 1r, that is to say the modulusof the expression (I F (I F is less than one.-half, l and hence (1),,may be determined by knowledge of I F and F Taking the four examplesshown in FIGS. 3a to 3d all of which comply with this proviso it can beseen that in example I (FIG. 3a) I I in example II (FIG. 3b) I I inexample III (FIG. 3c) I I 1 in example IV (FIG. 3d) I 1 When I I i 1 thevectors are spread around the dotted line, which we may call the 12oclock position, and when I I the vectors are not spread around the 12oclock position.

Hence, if F and F are known by measurement then can be found as follows:

8='(8F+B) 21'r (v) where for vectors spread around the 12 oclockposition' B l for SF negative and B l for 6F positive where for vectorsnot spread around the 12 oclock position B 0 where 5F i m 4 1. and whereB represents I I and can be conveniently represented as For theambiguous condition of vector spreads equal to 1r, the equality /8F/ /zholds. This only arises when 0 approaches the maximum angle 6 which canbe measured without ambiguity, and so the processing logic must resolvethis ambiguity in favour of this condition by the further requirementCombining these requirements, the complete processing is wherea.A=O,-B=O,C= l, for /8F/'less than A: b.A= I,B=O,C=O, for /SF/ /2 c.'A=0',-B,= 1, C 1,

for /8F/ greater than /2 i and SF negative (I. A=0,B=1,C=1,

for /8F/ greater than /2 and SF positive i It should here be noted thatsince /8/ is less than 1r then coincident vectors are not ambiguous.

It is convenient now to consider in greater detail the operation of thesystem in the presence of ground reflections, bearing in mind theproviso mentioned above that /i 'd is less than 1r. The errors inmeasurements .made between the common aerial element 0 and any otherelement n are first those arising from interfering ground'reflections ateach element which will be de-, noted as G with the subscriptappropriate to each particular element, .and the error in the digitalcircuits which digitize the phase-difference between elements 0 andanother element which will denoted by D with the subscript appropriateto the element other than the common element of the pair.

7 Thus we may write 211' n asin 0/)\ i (G,, G i D nd (1),, 217 (n+1) dsin O/lct (G G i D Let /G,,/ G l G and /D,,/ /D,, D/2 that is to sayhalf the phase digital increment. The phase digital increment is theincrement in 4) represented by unit increment of its digital indication;examples of such digitizing using modified output signals -F', -I-I"', Eand G from hybrid junctions are given in Table l. which shows incrementsof 1r/4, that is 45, set out as a four-bit Johnson code truth table. Forconvenience, the outputs are headed in Table lalso by designations suchas C and S( 1 defined in that C(qS) 0 if cos d) is positive and 1 if cosd) is negative, similaryly for S (cb). These designations thus give thetrigonometrical significance (as regards phase difference) of theoutputs.

The code contains eight unique combinations out of a possible 16combinations with four digits and only one digit changes at a time. Inanother method of deriving a digital indication of phase thediscriminator incorporates a length of delay-line having four tappingpoints; in the present system a discriminator with a digital incrementof 45 gives adequate resolution and one convenient form is that of thefour-tap delay line.

Assuming that the total errors are at a maximum we may .write eration.

G- depends on a number of parameters including array geometry andterrain characteristics and varies with angle for two reasons. First,the ground reflection coefficient falls rapidly with increasing angleover most terrains: secondly, as angle increases, the ground reflectedsignal is increasingly attenuated because the angle between the aerialmain beam axis and the reflected wave increases. In practice the secondeffect predominates and as a result G becomes very small above aboutfive degrees for all surfaces as can be seen from FIG. 4 which shows ata the general form of the limits of the graph of the modulus of thefunction 2G plotted against elevation angle 0 for the proposed arrayover flat Bedford clay known to be a difficultterrain. This curve isderived from a plot produced by computer simulation based on knownground parameters.

FIG. 4 also shows at b the line representing 2 1+ d sin O/A; it will benoted that as the horizontal axis of FIG. 4 catersonly for elevationangles 6 of up to 8, then since at these small angles 0= sin 0 for allpractical purposes, 2 11' d sin 0A is directly proportional to 0 andtherefore b is a straight line. If the graphs a and b are added so as toproduce a sum graph representing 2 1r d sin 6M +2G and of which thegeneral form is indicated at c. it will be found that for angles 0 ofabout 4 or less the peak of the sum graph 0 will occur at the samevalues of 0 as that for the first two peaks of graph a; in this instancethese peaks of the sum graph 0 attain an angle 4) of about 100 atelevations 0 of about 0.7 and 12, these values of (1) comprisingapproximately 20 or morerattributable to the effect of graph b andapproximately 80 or less attributable to graph a. Above an elevation of4 the influence of ground reflections becomes of minimal importance, andthe sum graph 0 becomes asymptotic to the line b.

Thus, for elevation angles of less than about 4 there is a margin ofabout 80, in the measurement of 4), available to cater for theinstrumental that is to say digitizing errors represented by D. Sincethis error can reliably be assumed not to exceed the digital increment,see above, of 45 this margin of 80 is ample to accommodate theinstrumental errors at these elevation angles.

It will of course be appreciated that the slope of the line b of FIG. 4is dependent upon the ratio d/ in the experimental embodiment at presentunder discussion the basic serial system comprised a vertically-extending linear array of eight receiving horns operating at a frequency of 5.1GHZ giving a wavelength of )t 5.9 cm. The height, that is to say thevertical dimension, of the aperture of each horn was some 21 cm; withthe horns touching this gave a spacing d also of 21 cm. as can of coursereadily be verified from the slope of the line b of FIG. 4.

From the above discussion and in particular from expression (vii) it canbe appreciated the basic angular converage 0 that is to say the maximumangle 0 which can be measured without ambiguity and which of coursedepends upon the geometry of the closestspaced interferometer pair, isdefined by the limiting condition 2 rrrrdsin 0/)t='rr (viii) sin 6 X/Zdwhich from the parameters defined in the preceding 1 paragraph yields abasic coverage of some eight deto a pure binary code before any logicprocesses are performed. Thus a phase angle (12 can be indicated by aseries of binary digits of which the lower-order digits can representthe fraction F and higher-order digits 7 represent the integer I so thatwhere in expressions (v) and (vi) and in expressions which will bederived later the angle includes a function representing unity or anintegral multiple of unity, for example B 1, this means that one or moreunit increments are added to the higher-order digits representing I andthe logic circuits therefore will be arranged to do this. Where afunction is a multiplying function, for example C in the expres sion(08F) which can only assume the values of either zero or unity it canlogically be regarded as a two-state gating function and with theseconceptions in mind it is then possible to draw a logic diagram whichwill give effect to the requirements of expression (vi). It is pointedout that because such a diagram can usually be drawn in severeal waysall of which are equally valid and also because portions of the circuitare required to handle series of binary digits as well as performtwostate logic functions, the diagram of FIG. 5 and those of FIGS. 7, 9,11, 12 and 13 should not be taken to imply the physical existence ofappropriate components in the equipment but merely to indicate in asimplified way the logic steps necessary to achieve the desired result.

Referring now to FIG. 5, which in the main is selfexplanatory, binarydigits representing F,, and F are applied to a difference or subtractstage S1 of which the output is a binary digital signal indicating thefunction 8F (F F this function is combined in a first AND gate,hereinafter referred to as the BF gate, with the function C so as toprovide an output C.8F. The function 8F is also applied to a modulusstage M which provides a binary digital signal indicating the function/8F/ the function /6F/ is combined in a second AND gate, hereinafterreferred to as the /SF/ gate, with the function A so as to provide anoutput A/BFl. The function /6F/ is also applied to one input of a seconddifference stage S2 which at its other input receives a binary digitalfunction representing one half. The stage S2 compares its two inputs andprovides two signals each of which can assume one of only two statesZERO and ONE; for one signal W a ONE state can only occur if /6F/ andfor the other signal Q from which is derived an output representing thefunction [3 of expression (vi) a ONE state can only occur if /8F/ isgreater than /2; these conditions for ONE outputs are indicated in FIG.5. In this simplified diagram it can be seen that the signal V1 is usedto represent the function A so that W A C whilst the signal Q providesthe presence or absence of the function B so that Q i B.

The stage S1 also generates a two-state signal K which assumes the stateONE when SP is positive, that is to say greater than zero, and thissignal is applied to an inverting stage IV; in the presence of a ONEsignal at K the signal Q is inverted, that is to say when Q is ONE thena signal MINUS ONE will appear at the output B so that B can thus assumeone of the three states defined for expression (vi).

If /8F/ is less than x then signals Q and W from stage S2 are both ZERO;the appearance of a ZERO condition at the /SF/ gate will maintain thatgate closed and A and B will both be zero but the ZERO state at thenegated input of the 6P gate opens that gate to permit the passage ofthe function 8F and provide an output C.8F where C 1.

If /8F/ k then the function B will again be ZERO; the appearance of aONE condition at the negated input of the SF gate will close the gateand establish the condition C.8F and the appearance of a ONE conditionat the input to the /F/ gate will open that gate to provide an outputA/8F/ where A I.

If /8F/ is greater than k the ZERO state of signal W results in thecondition A 0, C I as already described for /8F/ less than /2. Thesignal Q will be in the ONE state and will pass to the inverting stageVI; if SE is greater than zero signal K will be in the ONE state and thesignal Q will be inverted to provide an output B I; if SP is less thanzero then signal K will be in the SERO state and no inversion will takeplace, providing an output B +1.

As has been already described the basic angular coverage 0,, of someeight degrees is determined by the spacing a between adjacent aerialelements which is of course also the spacing between the elements of theclosest-spaced interferometer pair; further, it has always been assumedheretofore that the largest angle unambiguously measurable by aninterferometer pair is limited by the geometry of the system in themanner discussed above with reference to expression (iv).

It has been shown that (15,, can be determined from F and E providedthat /8/ is less than 11' and that this condition is exceeded when 6 isgreater than 0 If 0 lies in the range between zero and 20,, and if nosignificant ground reflections are present within this range then 8115will lie between 0 and Zn and can be measured unambiguously. In thepresence of ground reflections unambiguous measurement is still possibleprovided that 21rd sin 0/)\ is greater than 26 that is to say forelevation angles 0 above the cross-over point of FIG. 4 which occurs atan angle a of about 2; thus if a is the angle given by the expressionthen 0 can be measured unambiguously within the range a to 2 6 If theangle 0 lies in the range between zero and 20,, we may establish theproviso that 6d) be less than 211'; taking the four examples shown inFIGS. 6a to 6d all of which comply with this proviso it can be seen thatin examples I and VI as shown in FIGS. 6a and 6d I,, 1,, and SP ispositive in examples III and V according to FIGS. 60 and 6d I,, I 1 andSP is negative Examples I and III (FIGS. 6a and 60) have of coursealready been encountered in FIGS. 3a and 3c and in examples III and V(FIGS 6b and 6d) the vectors are again spread around the 12 oclockposition in that the angle between them indicated on the FIGS. 6a to 6dfor each example includes this position. Thus, following the processesset out earlier, we can propound a second mode of operation in which(1),, can be found from the expression where B 1 when 8F is negative andB 0 when 8F is positive For the ambiguous condition of coincidentvectors F F ;this occurs when 0 approaches zero or 20,, and theprocessing logic has been arranged to resolve this ambiguity in favourof 6 zero giving the further requirement, for SE 0, that B 0 inexpression (x).

Combining these requirements, the complete processing is as defined inexpression (x) but where a. B l for SF negative and (b) B for SF zero orpositive A suitable logic-processing arrangement is shown in verysimplified block diagram form in FIG. 7: digital quantities representingF and F,, are applied to the inputs of a subtraction stage S1 whichprovides a binary digital signal representing the function 8F and atwostate signal which assumes the ONE state when 8F is negative;comparison with FIG. leads to the convenient notation of K (not K) forthis two-state signal.

So far we have only considered the angular elevation range up to a limitof 2 0,, which, bearing in mind the terms of expression (viii), gives amaximum elevation angle 0 defined by the limiting expression sin 0 A/dwhich of course is merely another way of incorporating the requirementof unambiguity into expression (iv) and yields a maximum value of 0which is still no greater than that of expression (iv).

Let us now consider an angle 0 which lies in the range between 0,, and30,, so that 80 lies in the range 11' to 3w; taking the four examples inFIGS. 8a and 8d all which comply with this proviso it can be seen thatwe can propound a third mode of operation in which 8d can once again bedefined by general expression (v) but that now the requirements are B 1for examples V and VII (FIGS 8a and 8d) where ISF/ is less than Va and B2 for examples VI and VIII (FIGS. 80 and 80') where /8F/ is more than /2Examples V and VI (FIGS. 8d and 8b) have already been encountered inFIGS. 6b and 6d.

For the ambiguous condition of vector spreads equal to 11' the quality/8F/ /2 once more holds; this occurs when 0 approaches 0,, or 30,, andthe processing logic is arranged to resolve this ambiguity in favour of0 0,, giving the further requirement, for this condition,

Combining these requirements, the complete processing is, again,

where a. A 0, B =1, C =1, for /8F/ less than /2 b.A=1,B=0,C=O,for/8F/=/and c. A 0, B 2, C 1, for /8F/ greater than /2 The similarity of thisprocessing with that derived for the conditions illustrated in FIGS. 3ato 3d is obvious.

A suitable logic-processing arrangement is shown, again in a simplifiedmanner, in block diagram form in FIG. 9, which, as might be expected, isvery similar to FIG. 5 and the operation of this arrangement for thecondition /8F/ 7% is exactly the same as has been described withreference to FIG. 5. FIG. 7 differs from FIG. 5 in that there is nosignal K indicating the sign of SF and in that the output B is providedat two terminals of which one indicates the condition B l and the otherthe condition B 2; selection of the appropriate output terminal iseffected with the aid of a further AND gate, hereinafter referred to asthe B gate, having two negated inputs.

If /8F/ is less than the signals W and Q derived from the stage S2 willboth be ze aso that the B gate will open and provide an output W.Q=B=l.

If /6F/ is greater than /2 then because Q is in the ONE state the B gatewill be closed and output Q B 2 will be provided.

For all values of /8F/ the SF and /6F/ gates operate in the same manneras that described with reference to FIG. 5.

It can be seen that there are three modes of operation for 0 lyingbetween zero and 0,,

0 lying between a and 20,, and

0 lying between 0,, and 30,, where a is about 2 and 0,, is about 8 inthe particular embodiment under discussion. For angles between a and 0,,the first and second modes overlap and for angles between 0,, and 20,,the second and third modes overlap. Within a region of overlap bothmodes give the same output as can be understood from the inclusion ofExamples 1 and III as shown both in FIGS. 3a, 3c and in FIGS. 6a, 60 andthe inclusion of Examples V and VI as shown both FIGS. 6b and 6d and inFIGS. 8b, 8d but by establishing a lower boundary somewhere between aand 0,, and an upper boundary somewhere between 0,, and 20,, threesectors of operation can be defined. Conveniently, let the lowerboundary be half way between oz and 0,, that is to say at 5 and let theupper boundary be half way between 0,, and 20,, that is to say at 12;the three modes listed above are now operative over three sectors Mode1: 0 to 5,

Mode 2: 5 to 12, and

Mode 3: 12 to 24 Because within a region of overlap both adjacent modesgive the same output, the arrangement for determining which mode ofoperation is to be used, that is to say the sector definitionarrangements, need not be particularly accurate and one simple sectordefinition arrangement which has been found satisfactory in experimentalwork will now be described with reference to FIGS. 10 and 11.

Consider two directional aerials, for example horn aerials, havingidentical properties but so arranged relative to each other that theirbeam axes diverge: this is illustrated in FIG. 10 where the beam axis zaof a lobe pattern z is at an angle with respect to the beam axis ya of alobe pattern y: simple amplitude measurements between signals receivedon the two aerials can then be used to define a boundary indicated asz/y. In a slightly different form of this method the signal received onone of the two horns is attenuated so as to give the relative patternsillustrated at y and x on FIG. 10: here, the boundary y/x occurs alongthe beam axis xa of the pattern x.

FIG. 11 illustrates in block diagram form a simple arrangement basedupon the method of comparing amplitudes between the lobe patterns y andx in FIG. 10. This sector-definition arrangement comprises threereceiving horns arranged with their beam axes at angles of 24, 12 and 5to the horizontal respectively and these three aerials are referenced onFIG. 11 by their appropriate beam angle. Each aerial feeds a receiver Rwhich includes a mixer stage so that from each receiver the output at asuitable intermediate frequency is passed to the amplitude-comparingarrangements. Considering first the 5 signal this is passed through anattenuator AT to a logarithmic amplifier LA whilst an unattenuatedsignal from the 12 receiver is passed through a further logarithmicamplifier: the outputs of these two amplifiers are then compared in adifferential amplifier DA2 so that we may regard the 5 signal as thatcorresponding to lobe x in FIG. and the 12 signal as that correspondingto lobe y. The differential amplifier DA2 compares the amplitudes of itstwo inputs and provides at an output terminal L a ONE output when themagnitude of the attenuated 5 signal is greater than that of the 12signal, thus establishing a sector boundary at an angle xa which is thesame as the beam axis of the x lobe pattern, in this case 5. I

The 12 signal is also passed through an attenuator AT to a logarithmicamplifier LA as is also the unattenuated 24 signal and the outputs ofthis pair of amplifiers is compared in a differential amplifier DAl;here, I

we may now regard the 24 aerial as having the pattern 1 and the 12aerial as having the pattern x so that the sector boundary xa is thesame as the beam axis of the 12 aerial, that is to say 12. The amplifierDAl is arranged to give a ONE output when the y magnitude is greaterthan the x magnitude, that is to say it will give a ONE output when theangle 0 is greater than 12. The output of DAl is applied to an AND gatewhich has a second, negated, input from terminal L so that for anglesgreater than 5 we may regard this AND gate as being prepared by a zerosignal at terminal L and for angles above 12 a ONE output from DAl willpass through this gate and appear at output terminal H. We may thusdefine a short truth table as follows.

0 less than 5 0 between 5 and 12 0 greater than 12 Referring now to FIG.12 this illustrates the combined logic system incorporating the threearrangements of FIGS. 5, 7 and 9 and also includes logic elements forselecting the appropriate one of the three modes of operation. In thisparticular arrangement the phase angles are measured in parallel, thatis to say simultaneously, so that for the outputs F and F from thediscriminators we require four lines one for each of the four bits ofthe Johnson code: however, since it is necessary to be able to indicatenegative values of 6F thus requiring an extra binary digit, and sincefour-bit logic circuits are readily available, as has been mentionedearlier the outputs from the discriminators are converted from afour-bit Johnson code to a pure three-bit binary code before beingapplied to the input stage S1. The output from this stage then can be-ina four-bit form in which one digit indicate the sign, that is to saypositive or negative as the case may be, of SF and the other threedigits indicate the magnitude of BF. It will be obvious that the tagesand interconnections handling the function /5F/ do not require thesignindicating digit. In the diagrams of FIGS. 5, 7 and 9 only a singleline is shown for these interconnections but in the diagram of FIG. 12those parts of the circuit which are required to handle three or fourinformation bits are indicated schematically. These portions of thecircuit are those handling the phase information F F 8F, /6F/, and thefraction /2.

As the operation of certain parts of the diagramof FIG. 12 has alreadybeen described with reference to FIGS. 5, 7, 9 and 11 the followingdescription in the main will be directed towards indicating how thecomplete circuit can be made to function according to the particular.node of operation appropriate. In order to select the required modecertain additional logic is necessary and in the following descriptionthe convenient convention has been adopted of indicating a gate by thesymbol used to indicate the presence of its output signal. Thus, the ANDgate at the top of FIG. 12 which has two negated inputs fed fromterminals L and H respectively and has an output V is termed the V gate:similarly, the gate fed by signal V and also having a second negatedinput K, is termed the B2 gate.

In this connection understanding of the logic circuit of FIG. 12 can beassisted by reference to the Table 2 which sets out the logic conditionsapplicable to the various modes of operation.

The circuit depends for its operation upon four measurements madeoutside the circuit and two measurements made inside the circuit. Two ofthe measurements made outside the circuit are those necessary todetermine the fractional phases F, and F and in this particularembodiment these are applied to the circuit .as as three-bit pure binarycode: the other two measurements are in two-state binary form indicatingat L and H the appropriate mode of operation to be selected: the twomeasurements made inside the circuit are in two-state form and are firstthat made to determine whether or not the quantity /8F/ is greater thanone half and secondly the measurement made to determine whether 8F is oris not greater than Zero. Of the four measurements made in two-stateform, the method of deriving L and H to indicate the mode of operationhas already been encountered in FIGS. 10 and 11, the determination ofSF, indicated by the symbol K when 8F is greater than 0, has alreadybeen encountered in FIG. 5 whilst the measurement of the-magnitude of/8F/ and its indication by the symbols Q and W has already v beenencountered in FIGS. 5 and 9.

In some conditions certain of these measurements are not made: forexample, in Mode 2 the state of logic signals W and Q is not relevant,so then in Table 2 where such measurements are not made the appropriatecolumn is indicated by a dash. Where subsequent logic operations dependupon such measurements the relevant column will have a question mark inplace of the usual 0 or I but it will be seen that in the event thelogic is such as to eliminate these questionable conditions so asunambiguously to determine the values of the functions A, B and C.

Let us first consider the operation of the arrangement shown in FIG. 12for Mode 1, that is to say where the angle 0 is less than 5. Here, wehave a 1 conditions at terminal L and a 0 condition at terminal H givinga 0 output from the V gate a 1 output from the V OR gate and also a 1input L to a stage T: this stage T has not so har been described withreference to previous Figures but at present it will suffice to statethat it is a stage which provides from an input of two signals Land Otwo outputs N1 and N2 which have the logic that N1 L.Q +EO. and that N2QL. One arrangement for performing the,funct ions of this stage T willbe described later. For Mode 1 therefore we may establish the generalconditions L.H.V. For operation in submade 1 (a) we have the conditionthat /8F/ is less than V: so that W and (lbgth are in the O state and wearrive at the condition V.W. Z which as can be seen from the Tableyields a result A 0, C I For sub-mode 1 (b) we have the condition /5F//zthatis to say W l whilst Q still is equal to 0; reference to the Table2 and FIG. 12 indicates that this yields the result A f 1, C 0. Forsub-mode 1 (c) we have the condition K because SP is not greater thanzero and /SF/ is great er than /2 so that we have in addition thecondition QW, yielding the result A 0, C 1: however the appearance ofthe condition V.W will provide a state Z l whilst the condition Q I willprovide an output N1: the condition N1. Twill provide a 1 output fromthe Y gate and this combined with the condition Z 1 will provide anoutput indicating l at the centre of the three B1 terminals. In sub-model (d) we have the condition that K 1 so that J 1 thus providing a 1output from the X gate, and this combined with the presence of a 1signal at Z provides an output at the right hand of the three B1terminals giving the value B1 1.

In both sub-modes 1 (c) and 1 (d) the function A and therefore thefunction C 1. Comparison of FIGS. 12 and together with the Table 2 inview of the explanation above will indicate that the requirements ofexpression (vi) are met for each of the four conditions of Mode l.

For Mode 2 we have the condition TAH. V if SP is positive then forsub-mode 2 (a) we have the condition V.K. giving a +1 output at B2: forSF negative there will be no output from the B2 gate giving the netresult B 0. Whatever the sign of 8F we have the condition V 1 so thatthe A gate remains closed giving A 0, C =1 this fulfills therequirements of expression (x).

Considering now Mode 3 of operation, we have the condition L O and H 1which yields the condition V; also, 8F is always greater than zero sothai we also have the condition K l. The conditions for V and for W thusare the same as those for Mode 1 and therefore the SF gate and the /8F/gate for sub-modes 3 (a), (b) and (c) are the same as those forsub-modes 1 (a), (b) and (c) respectively.

For sub-mode 3 (a) we have the condition L.Q. giving an output N1 l andthis combined with the conditon T gives a 1 output from the Y gate: thiscombines with the condition Z l in the middle one of the three Bl gatesand yields an output B1 1. For sub-mode 3 (b) we have W 1 so that Z Oand all three of the B1 gates are closed yielding an output B1 0. Forsubmode 3 (c) the Z gate is again opened whilst the condition QI. willgive a 1 output from the N2 gate with the result that the left-hand oneof the three B1 gate will be open giving an output indicating B1 =2.

It will of course be apparent that the integral part 8] of the phasedifference 8:1) is finally represented in digital form by addingtogether the outputs B1 and B2 by simple logic addition means not shownin FIG. 12 so as to arrive at the net integral part B as set out'inTable 2.

Turning now to FIG. 13 this shows by way of example one arrangement forrealizing the stage T referred to in the preceding description of theFIG. 12. In this arrangement this stage is composed of three AND gatesand one OR gate; the input and output terminals of this arrangement canreadily be identified with the stage T on FIG. 12 whilst the logicoperations, which are also indicated on FIG. 13, will also be obvioushaving regard to those indicated in Table 2; and the previousdescription of FIG. 12.

Referring now to FIG. 14 this illustrates the complete equipment, withthe exception of the sector-definition arrangement, in block diagramform. At the left-hand side of the Figure are the eight aerial hornswith the common aerial C at the bottom and the others being numbered inascending order, compare FIG. 1. The signal from each horn is amplifiedin a superhetrodyne receiver R and is applied at intermediate frequencyto one of a series of phase discriminators U. Because of the necessityto preserve at the intermediate frequency the relative phase differencesin the signals from the aerials, the receivers R are all fed in phasefrom a common local ascillator source not shown. If desired this sourcemay also supply the three receivers R of the sector-definitionarrangement illustrated in FIG. 11 although of course the preservationof phase relationships here is not necessary.

The phase difference between the signal derived from each horn and thusderived from the common horn C is measured by the series ofdiscriminators U which provide a Johnson four-bit digital indication ofthe fractional phase difference F as already discussed above: theseoutputs are labelled F to F respectively and each adjacent pair ofoutputs corresponds of course to F and F referred to earlier. Theoutputs from these discriminators are then applied through codeconverters not shown to a series of circuits of the type illustrated inFIG. 12 and indicated on FIG. 14 by this reference numeral, so as toobtain a series of outputs in the from 84),, where n varies from 1 to 7.In order to preserve symmetry a digital representation of the fractionalangle F that is to say when n 0, is applied to the bottom one of thiscolumn of FIG. 12 circuits. The outputs representing 6d) are thenapplied to a chain of adders P so as to obtain outputs of the form (1),,84) where, again, n extends from 1 to 7: again, in order to preservesymmetry and identity of this chain of circuits, a digitalrepresentation corresponding to (b is applied to the bottom one of thechain.

The digital representation of the three phases (1) (15 and (1) are addedin a further adder PA and the other four digital phases are added in anadder PB.

As has already been discussed there are several ways of deriving anaverage of these phase measurements: if we follow the method defined byexpression (iii) then the two sums derived by adders PA and PB can beapplied to a substracting stage S3 which will incorporate means fortaking account of the scaling factor ,8. The output from stage S3 thusfinally will be in the form of an average angle 0 expressed in a digitalcode.

If on the other hand it is proposed to use the method defined byexpression (iii) (b) then the outputs of the two stages PA and PB willbe added and, after taking into account the divisor 28d, and output canagain be derived, in digital form, of the phase angle 0.

Although two methods of deriving this average phase angle 0 have beendiscussed, the simple arithmetical manipulations necessary to cater forother methods of producing such an average will be obvious to thoseskilled in the art.

There is one further element in F IG. 14 which has so far not beendiscussed in the present Specification; this is a phase modulator PMwhich is shown in series with the output from the common aerial receiverto the junction of the discriminators. This phase modulator is in theform of a simple resistor-capacitor phase-shifter where the resistor isvoltage-dependent. A ramp generator not shown provides a signal,suitably at about 20 Hz and of triangular waveform and this is appliedto the voltage-dependent resistor in the phase modulator. Thus, thephase of the signals entering the modulator from the receiver R ismodulated by applying this triangular wave to the phase modulator:suitably, the phase excursion is equal to the digital interval of thephase discriminators U, that is to say in this particular embodiment 45.The phase of the signal emerging from the phase modulator thus variesover the digital interval and this phase variation, being in the commonline, thus influences all of the phase discriminators: when integratedover a number of measurements the digital interval is averaged out andit has been found that by means of this phase wobble technique the phasemeasurements can be made more accurately than the digital interval of45.

As has already been mentioned with reference to FIG. 1, the aerialarrangement comprises a verticallyextending array of equally-spacedreceiver horns and three adjacent horns forming part of an experimentalarray are illustrated in FIG. 15. In condition array, each horn had avertical aperture height h of 21 cm. and the beam axis ha of each hornwas tilted at an angle tof 1 1 relative to the horizontal. far

TABLE 1 Values of F H' E G 7T SW t r) b 'n' 311 1r C(+ C (111+- C() C 24 4 1r/4 0 O 0 0 1r/2 O O 0 1 31r/4 0 0 1 1 1r 0 1 l l 51r/4 l 1 1 131/2 1 1 1 O 71r/4 l l O 0 2r 1 0 0 0 TABLE 2 MODES LOGIC l 2 3 SIGNALSa b c d a b a b c L 0 5 1 l 1 1 0 0 0 0 0 H 0 12 0 0 0 0 O O 1 1 1 K 8F0 0 1 0 1 1 1 1 W (/SF/ k) 0 l 0 0 0 l 0 Q =L/8F/ O 0 1 1 0 0 1 V L. H.O 0 0 0 l l 0 0 0 J L.K. 0 1 0 O 0 0 0 Z =W.V l O l 1 0 0 l 0 1 N1 L.Q+t Q 0 0 1 l 1 1 0 N2 OT. 0 0 O 0 O 0 1 X =N1..1 O 0 0 1 0 0 0 0 0 Y NIJO 0 1 0 1 1 0 (B1 1)= Z.X 0 0 0 l 0 O 0 O 0 (B1 l) Z.Y 0 0 1 0 O 0 l 0 0(B1 2) Z.N2 O 0 O O 0 0 0 0 1 B2 iv 0 0 0 0 1 0 0 0 0 B=Bl lus B2 0 0 +11 +1 0 +1 0 2 A W.% 0 l 0 '0 0 0 0 l 0 A l 0 1 1 l 1 l 0 1 What we claimis:

1. A vertical radio interferometer system comprising avertically-extending rectilinear array of equallyspaced aerial elementsforming between a common element and each of the other elementsrespectively a plurality of interferometer pairs of which the spacingincreases in arithmetical progression, a series of phase discriminatorseach associated with a respective interferometer pair to derivetherefrom a respective phasedifference measurement in digital form anddigital logic means to derive from the series of respective measurementsan average phase measurement representative of the vertical angle 0 ofradiation incident on the aerial array.

2. A system as claimed in claim 1, wherein each phase discriminator isoperative to compare signals having a phase difference of 45 2 1r (1 F)radians where I is an integer and F is a positive fraction and to derivetherefrom a digital measurement of the angle 2 17 F, and wherein thedigital logic means is operative to calculate the angle 2 'n' I and toadd thereto the measurement derived by the discriminator to provide ameasurement in digital form of the phase difference 84).

3. A system as claimed in claim 2 wherein the digital logic meanscomprises a series of digital logic stages each associated with arespective pair of adjacent phase discriminators in the series ofdiscriminators and wherein each logic stage is operative to receive thedigital measurements from the pair of discriminators and to calculatetherefrom the angle 2 'n' I.

4. A system as claimed in claim 3 comprisisng a further digital logicstage associated with only that discriminator which is associated withthe closest-spaced interferometer pair.

5. A system as claimed in claim 4 comprising a chain of digital addingstages each arranged to receive the phase-difference measurement of845,, from a respective n the logic stage and each, except the first inthe chain for which n 1, arranged to receive from the next precedingadding stage a phase measurement of and to add the two measurementstogether to produce an output representing the phase 4) 6. A system asclaimed in claim 5 comprising digital averaging means operative toreceive from the adding stages measurements of the phases (1),, (1)(1),, and to derive therefrom an average phase indicative of thevertical angle 0.

7. A system as claimed in claim 6 wherein the digital averaging means isoperative to weight the respective phase measurements to derive aweighted average phase indicative of the angle 0.

8. A system as claimed in claim 1 for measuring within a range of anglesthe vertical angle 0, comprising sector-definition means for dividingthe said range into a plurality of sectors and defining within whichsector the angle 0 lies.

9. A. system as claimed in claim 8 wherein the digital logic means isoperative upon receipt of information from the sector-definition meansto select from a plurality of logic processes a combination appropriateto the defined sector.

1. A vertical radio interferometer system comprising avertically-extending rectilinear array of equally-spaced aerial elementsforming between a common element and each of the other elementsrespectively a plurality of interferometer pairs of which the spacingincreases in arithmetical progression, a series of phase discriminatorseach associated with a respective interferometer pair to derivetherefrom a respective phasedifference measurement in digital form anddigital logic means to derive from the series of respective measurementsan average phase measurement representative of the vertical angle thetaof radiation incident on the aerial array.
 2. A system as claimed inclaim 1, wherein each phase discriminator is operative to comparesignals having a phase difference of delta phi 2 pi (I + F) radianswhere I is an integer and F is a positive fraction and to derivetherefrom a digital measurement of the angle 2 pi F, and wherein thedigital logic means is opeRative to calculate the angle 2 pi I and toadd thereto the measurement derived by the discriminator to provide ameasurement in digital form of the phase difference delta phi .
 3. Asystem as claimed in claim 2 wherein the digital logic means comprises aseries of digital logic stages each associated with a respective pair ofadjacent phase discriminators in the series of discriminators andwherein each logic stage is operative to receive the digitalmeasurements from the pair of discriminators and to calculate therefromthe angle 2 pi I.
 4. A system as claimed in claim 3 comprisisng afurther digital logic stage associated with only that discriminatorwhich is associated with the closest-spaced interferometer pair.
 5. Asystem as claimed in claim 4 comprising a chain of digital adding stageseach arranged to receive the phase-difference measurement of delta phi nfrom a respective n the logic stage and each, except the first in thechain for which n 1, arranged to receive from the next preceding addingstage a phase measurement of phi n 1 and to add the two measurementstogether to produce an output representing the phase phi n.
 6. A systemas claimed in claim 5 comprising digital averaging means operative toreceive from the adding stages measurements of the phases phi 1, phi 2 .. . phi n and to derive therefrom an average phase indicative of thevertical angle theta .
 7. A system as claimed in claim 6 wherein thedigital averaging means is operative to weight the respective phasemeasurements to derive a weighted average phase indicative of the angletheta .
 8. A system as claimed in claim 1 for measuring within a rangeof angles the vertical angle theta , comprising sector-definition meansfor dividing the said range into a plurality of sectors and definingwithin which sector the angle theta lies.
 9. A system as claimed inclaim 8 wherein the digital logic means is operative upon receipt ofinformation from the sector-definition means to select from a pluralityof logic processes a combination appropriate to the defined sector.